Multi-port packet switching devices by their nature require memory to temporarily buffer packets before transmission to their destination. Typically in a packet switching device a plurality of queues is required. At the minimum one queue per output port is required. Packet switching devices employ either an input, input output, output, or shared memory architectures or a combination of these. In most cases a bulk memory needs to be managed as a plurality of independent queues. A switching device may have a plurality of such memories. It is desirable to be able to manage such memory in the most efficient way as to facilitate a large number of queues and fast access with the minimum of resources. The present invention addresses such a need.